Most devices in present integrated circuits must be electrically contacted. For example, field effect transistors have source/drain regions and gate electrodes which are electrically contacted. As integrated circuits increase in complexity and the number and size of the devices increase and decrease, respectively, making such electrical contacts continues to become more difficult. The surface area available for the contacts becomes smaller and the necessity to avoid misalignment errors, which might inadvertently result in contacting the wrong portion of the surface, also dictates that small contacts be used. See, for example, U.S. Pat. No. 4,844,776 issued on Jul. 4, 1989 to K-H Lee, C-Y Lu and David Yaney for description of source/drain contacts above the source/drain regions.
Early lithographic patterning deposited a resist on a surface and selectively exposed portions of the resist to radiation, thereby altering the solubility of the resist when exposed to a suitable etching or developing agent. After the resist had been patterned to expose selected portions of the underlying material, the exposed portion of the material was removed by etching. In this format, etching is terminated after a predetermined time has elapsed or when another event, such as exposure of an underlying material, has occurred. The area of the contact so formed is identical to the area of the resist initially removed.
However, fabrication of contacts smaller than those defined in resist is frequently desirable and, to meet this desire, self-aligned contacts have been developed. In making such contacts, the size of the contact is smaller than the opening initially exposed in the resist because the etch ultimately exposes a material, covering a portion of the opening, which is relatively impervious to the etch. Only the remaining portion of the opening is etched.
One contact that is difficult to form at small dimensions, half micrometer and smaller, is the contact to the substrate between two gate electrodes or runners. The contact area is small and the contact must be formed without too much etching into the substrate or overetching of the gate electrode. The former might degrade the source/drain region and the latter might lead to electrical short circuits to the gate electrode if a conducting layer of the gate electrode is exposed by the etching process.